In general, the present technology relates to a semiconductor device and a method for manufacturing the semiconductor device. More particularly, the present technology relates to a semiconductor device having reduced resistance variations and improved wiring reliability and relates to a method for manufacturing the semiconductor device.
In recent years, the market of small-size camera modules applied to digital still cameras and smart phones draws attention. A CCD (Charge Couple Device) and a CMOS (Complementary Metal Oxide Semiconductor) image sensor are typical solid-state imaging devices used in the camera modules. In the case of such a solid-state imaging device, accompanying miniaturizations in the semiconductor technology, it has become possible to improve the performance of the image sensor, contract the footprint and enhance the integration. In addition, as one technology for further improving the performance of the image sensor, further contracting the footprint and further enhancing the integration, there has been provided a technology for manufacturing three-dimensional semiconductor integrated circuits. A typical example of this technology has been reported in Japanese Patent Laid-open No. 2010-245506 as a technology for manufacturing a semiconductor device configuring a solid-state image pickup device of the rear-surface radiation type. In accordance with this technology, first of all, semiconductor elements having different functions are joined to each other. In this case, the semiconductor elements having different functions are a semiconductor element having a pixel array and a semiconductor element having a logic circuit. Then, the pixel array and the logic circuit are connected electrically to each other by making use of TSV (Through-Silicon Via) configured to penetrate a silicon substrate.